Comments on: IBM Power Chips Blur The Lines To Memory And Accelerators https://www.nextplatform.com/2018/08/28/ibm-power-chips-blur-the-lines-to-memory-and-accelerators/ In-depth coverage of high-end computing at large enterprises, supercomputing centers, hyperscale data centers, and public clouds. Thu, 03 Sep 2020 22:46:28 +0000 hourly 1 https://wordpress.org/?v=6.7.1 By: Gary Rockley https://www.nextplatform.com/2018/08/28/ibm-power-chips-blur-the-lines-to-memory-and-accelerators/#comment-111926 Sat, 02 Feb 2019 00:43:37 +0000 http://www.nextplatform.com/?p=38255#comment-111926 Interesting article at least in terms of discussing the Centaur Chip.

I admit that I have to read it again a few more times.

However, I believe the purpose of Centaur was to aid in IBM’s CUoD (Capacity Upgrade on Demand) implementation which allows ‘inactive’ or functionally useless memory capacity to be installed pending ‘activation’.

From an end-user point of view, the ability to have significantly discounted hardware installed pending either permanent or temporary activation was an innovative and bold step from IBM. They only charge you the difference if one decides to activate the physical resource.

But, back when IBM first started CUoD, the physical hardware FRUs and CCINs were distinct. These days they are co-mingled.

Consequently, and especially with the newer Industry Standard DIMMs, one can not determine if a specific DIMM Module is regular Plug and Play or has been firmware flashed as usable. This potentially impacts even CUoD unaware Systems.

Why is this a big deal?

Consider these current List Prices for the various P9 DIMMs (which are all the same per IBM)
——————————————————-
MT | FC | Description | List Price |
—–|——|—————————-|————|
9008 | EM65 | 128 GB DDR4 MEMORY | 5,599 |
9223 | EM6M | 128 GB DDR4 MEMORY | 5,599 |
8335 | EM65 | 128 GB DDR4 MEMORY | 5,599 |
9040 | EM6E | 128 GB DDR4 MEMORY (2666MH | 3,679 |
——————————————————-

Note the price diff for MT 9040. Per IBM, these are the same Industry Standard DIMMs as for all the other MTs. (same CCINs and FRUs)

Assume I have a 9223 and wish to populate all 32x DIMM Slots with 128GB. Why would I not find a friendly IBM BP and order the 9040 DIMMs, saving nearly $64K?

btw, it would not be difficult to do so.

Before anyone says ‘firmware’, assume we can already flash the DIMMs with 9223 compliant firmware. According to IBM, they already have that scenario covered.

So, assume we are 2 or 3 years ahead of 2019. 1 Year Maintenance has expired.

A user looking to recover asset investment trades out a used 9040 on the open market and the trader doing the ‘take-out’ legitimately advertises the FRUs and CCINs.

In every way, these DIMMs are identical to the Plug and Play DIMMs that a 9223 owner already sees as exiting on his/her own system.

But, per IBM, these are not enabled and only they know the difference.

So, the question is this.

What the hell are IBM thinking using the same FRUs and CCINs for both Plug and Play DIMMs and DIMMs that require Activation?

Certainly, we know that IBM wrongly perceive the secondary market as their competition. In doing so for the last 20 years, IBM’s Mid-Range market share has dropped from over 90% to less than 14%.

They have never once focused on their real competitors, who make Mid-Range Systems easier – not harder for end users.

In the scenario described above, IBM’s only answer is that it is their secret and the 9223 owner should be under IBM Maintenance, ordering the parts from IBM.

But, this is exactly the attitude which caused IBM to sign a consent decree back in the 1950’s, pledging to make FRUs and PNs available to end -users.

In the Mid 2000’s, IBM went back to Fed Court in New York and requested to be released from the consent decree, arguing that all PNs were now on-line and that they would continue to publish PNs and FRUs for the benefit of those end users who did not wish to be bound to IBM Maintenance.

With the previous P8 (and now P9) co-mingled CUoD memery chips (both IS and Custom DIMMs) it is my personal and professional opinion that IBM are looking to circumvent not only the intent of the original 1950’s consent decree, but they also materially mis-represented their intentions to the Federal District of New York when they petitioned to be released from the Consent Decree.

After all, if you have a bunch of different PNs that will only work based upon a secret code, it absolutely no different to the situation which the Court found so egregious back in the 1950s.

This may seem like a trivial concern for IBM bloggers who have little interaction at street level with real end users, but, I assure you it is a big deal for end-users when either Third Party Maintenance – or even recovery of asset investment (either for upgrades of resale) is dictated by a single monopolistic source.

Quite frankly, with IBM’s couldn’t care less attitude towards end-users, it is no wonder that they have lost money now for 26 straight quarters, nor that they needed nearly $2 Billion from Google to finish Power9.

And, while IBM’s vagueness regarding something as trivial as co-mingled P9 Plug and Play vs CUoD Memory modules may seem inconsequential, imho, it is absolutely symptomatic of the reason that so many have turned their backs on IBM as a viable Mid-Range solution.

Gary

]]>
By: Kevin G https://www.nextplatform.com/2018/08/28/ibm-power-chips-blur-the-lines-to-memory-and-accelerators/#comment-103963 Fri, 07 Sep 2018 04:14:12 +0000 http://www.nextplatform.com/?p=38255#comment-103963 In reply to Timothy Prickett Morgan.

What about Global Foundries 12 nm FDSOI process? That would be a good fit for the 2019 refresh of POWER9.

]]>
By: Doron Fael https://www.nextplatform.com/2018/08/28/ibm-power-chips-blur-the-lines-to-memory-and-accelerators/#comment-103627 Sat, 01 Sep 2018 19:46:47 +0000 http://www.nextplatform.com/?p=38255#comment-103627 PCIe gen 5 is 32Gb/s per lane (32MHz is a typo)

]]>
By: Timothy Prickett Morgan https://www.nextplatform.com/2018/08/28/ibm-power-chips-blur-the-lines-to-memory-and-accelerators/#comment-103471 Thu, 30 Aug 2018 13:25:33 +0000 http://www.nextplatform.com/?p=38255#comment-103471 In reply to Stark.

IBM itself confirmed to me that it was looking at foundries other than GF for Power10, and the only three options are Intel (well, its 10 nanometer) and we all had a laugh about that, or TSMC or Samsung. It will be Samsung. Power9 and Power9′ will be on 14 nanometer or 12 nanometer.

]]>
By: Stark https://www.nextplatform.com/2018/08/28/ibm-power-chips-blur-the-lines-to-memory-and-accelerators/#comment-103455 Thu, 30 Aug 2018 07:13:48 +0000 http://www.nextplatform.com/?p=38255#comment-103455 In reply to OranjeeGeneral.

GF has confirmed they’ll stop development of 7nm FF, they haven’t said anything about FDSOI, which is what IBM uses & has contracted GF for.

]]>
By: OranjeeGeneral https://www.nextplatform.com/2018/08/28/ibm-power-chips-blur-the-lines-to-memory-and-accelerators/#comment-103403 Wed, 29 Aug 2018 13:58:42 +0000 http://www.nextplatform.com/?p=38255#comment-103403 In reply to Emily Samper.

Future of Power looks rather grim right now, especialy now that GF has confirmed it is basically stopping at 14nm and halted 7nm, IBM has to quickly find a new Foundry to continue.

]]>
By: Emily Samper https://www.nextplatform.com/2018/08/28/ibm-power-chips-blur-the-lines-to-memory-and-accelerators/#comment-103365 Wed, 29 Aug 2018 03:06:00 +0000 http://www.nextplatform.com/?p=38255#comment-103365 IO BW out of the CPU is key. IBM knows that and has lots of experience from Z business. POWER9 will rock!

]]>