Comments on: Meta Platforms Hacks CXL Memory Tier Into Linux

By: JayN

JayN — Sat, 25 Jun 2022 15:36:01 +0000

more info on meta’s use of the tiered memory for DLRM models in their youtube presentation, “Intel Optane Memory Requirements of Meta AI Workloads”.
so, cxl is enabling easier handling of tiered memory. Intel is moving Optane to a cxl memory memory pool. Looks like Meta will be a customer.

By: Timothy Prickett Morgan

Timothy Prickett Morgan — Sun, 19 Jun 2022 23:25:29 +0000

In reply to Dave Simonson. That is an interesting set of ideas.

By: Dave Simonson

Dave Simonson — Sun, 19 Jun 2022 19:13:33 +0000

It would be interesting to see the CXL management made a service on a SmartNIC/IPU/DPU/XPU that could aggregate the server before boot, monitor and disaggregate as requested, perhaps from a control console/utility. Could collect activity and performance statistics as well.
Not the only thing the XPU would do, but a useful basic add-on facility.

By: Eric Olson

Eric Olson — Sat, 18 Jun 2022 16:36:41 +0000

A comparison of the latency and coherency of IBM’s Power10 memory inception versus CXL memory framed in the context of large-socket NUMA architectures and the newly developed Linux TPP memory layer would be interesting.

The question in my mind is whether TPP could also benefit Linux on Power10 at both multisocket NUMA and memory inception levels.